groovylight

Author	SHA1	Message	Date
saji	f3789b6432	sokol works, working on nix tooling Some checks failed Verilator Unit Tests / Test (push) Failing after 5m10s Details	2024-05-26 08:48:38 -05:00
saji	4b570ad5a5	Update sim/src/main.cpp All checks were successful Verilator Unit Tests / Test (push) Successful in 5m16s Details	2024-05-25 17:33:36 +00:00
saji	8354677908	fix ci Some checks failed Verilator Unit Tests / Test (push) Failing after 5m23s Details	2024-05-25 12:16:18 -05:00
saji	46a42180ed	fix first pixel errors. Some checks failed Verilator Unit Tests / Test (push) Failing after 5m18s Details Moved the tests to a separate program to make way for sokol.	2024-05-25 12:04:12 -05:00
saji	905f61c814	fix cycle latency, broke first pixel Some checks failed Verilator Unit Tests / Test (push) Failing after 5m13s Details	2024-05-24 01:23:49 -05:00
saji	70de66231b	remove doc Some checks failed Verilator Unit Tests / Test (push) Failing after 5m1s Details	2024-05-24 00:42:37 -05:00
saji	1628edad62	add basic mdbook doc Some checks failed Verilator Unit Tests / Test (push) Failing after 5m23s Details	2024-05-23 12:07:53 -05:00
saji	37b813a015	cleanup, use checks instead of requires Some checks failed Verilator Unit Tests / Test (push) Failing after 5m18s Details	2024-05-23 11:58:44 -05:00
saji	c7fde88baf	Update README.md Some checks failed Verilator Unit Tests / Test (push) Failing after 4m57s Details	2024-05-23 06:21:48 +00:00
saji	7c7ccf81fc	use ninja instead Some checks failed Verilator Unit Tests / Test (push) Failing after 4m41s Details	2024-05-23 00:43:33 -05:00
saji	fdca36f9ce	add nix caching Some checks failed Verilator Unit Tests / Test (push) Failing after 9m4s Details	2024-05-23 00:36:53 -05:00
saji	7cd0e1c53c	fix bram behavior, adjust row offset Some checks failed Verilator Unit Tests / Test (push) Failing after 8m15s Details	2024-05-23 00:34:26 -05:00
saji	32deb30c92	add gitea actions	2024-05-23 00:33:20 -05:00
saji	d465fccaed	wip: refactor and fix rightmost pixel bug hack but now row1 doesn't work.	2024-05-22 22:26:33 -05:00
saji	2a7908eae9	wip: line scan test also factored out some code.	2024-05-22 15:59:38 -05:00
saji	da9c0c05a7	wip: text fixture refactor	2024-05-21 18:08:29 -05:00
saji	3a76a55e56	added more gitignore	2024-05-19 18:17:30 -05:00
saji	d4df01f5c6	add basic verilator sim	2024-05-19 00:15:53 -05:00
saji	b248c4d731	increase speed grade of chip to meet timing for bram	2024-05-10 11:31:51 -05:00
saji	bcb463a8d0	wip: 4x clock double-read bram	2024-05-09 17:31:15 -05:00
saji	2a8c70bab2	fix bit-loading latency using comb logic make frame counter for generating data	2024-05-02 20:30:51 -05:00
saji	37dabd603a	coordinator works now fixed some off by one errors to make the screen work good	2024-05-01 16:14:32 -05:00
saji	9a4dfea4f0	wip: basic pixel generator + coordinator module coordinator is a high level hub75 controller. It drives multiple panels by generating the x/y coordinates that would be displayed on each, then converting those into the BRAM format to be written quickly.	2024-04-30 23:48:10 -05:00
saji	bd2fa51f2d	wip: bitslicer	2024-04-30 01:41:31 -05:00
saji	31d612a2e8	wip: attempt at integrating, fail	2024-04-30 00:29:41 -05:00
saji	75ef4ad594	bram stuff	2024-04-29 01:16:36 -05:00
saji	00ebfa8009	initial verilog	2024-04-28 16:42:41 -05:00
saji	a0e1dcbdb0	got it working, was a busted port	2024-04-27 01:49:10 -05:00
saji	a7ba60b81f	wip: wishbone tool and non-workign hub75	2024-04-26 21:36:47 -05:00
saji	49e395653e	add hub75 port mapping	2024-04-24 17:14:39 -05:00
saji	ab8ef2c3d3	more things	2024-04-22 23:53:24 -05:00
saji	56aabf4fe9	added liteiclink for liteeth annoyingly Signed-off-by: saji <saji@saji.dev>	2024-04-19 15:41:43 -05:00
saji	d798122a87	initial stuff	2024-04-19 15:16:22 -05:00
saji	44dd9f79c7	added litespi Signed-off-by: saji <champ189@umn.edu>	2024-04-19 15:16:06 -05:00
saji	03370cff34	Initial commit	2024-04-19 15:13:39 +00:00

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85 commits