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amaranth-rewrite

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• 53639121e6 sdram simulation amaranth-rewrite saji 2024-11-02 08:14:15 -0500
• 09485a9753 more work on cxxrtl simulator, start outputting things saji 2024-11-02 08:14:15 -0500
• 300e8192fe start work on cxxrtl simulation backend saji 2024-10-29 16:13:33 -0500
• dd334e8bad cleanup; integrate geom into hub75 saji 2024-10-29 16:13:33 -0500
• ae1ad4633c refactor streams for fetching/addrgen write end to end test saji 2024-10-29 10:02:35 -0500
• 5f54b8acd8 fetcher basic doesn't support variable functions saji 2024-10-23 15:14:53 -0500
• 6b63b17bb8 working address stream generator saji 2024-10-21 12:42:35 -0500
• 2893262f87 more work on fetcher saji 2024-10-14 11:15:03 -0500
• 261dedc4dc rework geometry so displaystring position is always topleft screen coord saji 2024-10-14 11:15:03 -0500
• 6b034b0176 add wip fetcher Saji 2024-10-08 20:57:49 -0500
• e945aa03f2 fix tests Saji 2024-10-08 20:57:49 -0500
• 3187db40ae add displaystrobe, config/geom fixes saji 2024-10-05 00:24:16 -0500
• 88426ac89a cleanup tests, make data address combinational saji 2024-09-30 10:20:17 -0500
• 7a0f59c9f6 add more tests to display data driver fix timing issues with display driver saji 2024-09-28 19:38:22 -0500
• 245108a07a move swapbuffer test to hub75.py saji 2024-09-28 17:18:09 -0500
• 8477698d77 add rgbview with channel_slice operator saji 2024-09-28 17:18:09 -0500
• 95ca2447cb add geom properties Saji 2024-09-28 14:34:38 -0500
• 5ae230ac00 make dual-mode data driver for hub75 Saji 2024-09-28 14:34:38 -0500
• 2c88d73ded update lockfile Saji 2024-09-28 00:40:37 -0500
• 0c1d924166 add cxxrtl platform Saji 2024-09-27 01:04:17 -0500
• 3d49afe6ed rename bitslicer to hub75, rework hub75ctrl sig Saji 2024-09-27 01:04:17 -0500
• c328d174ad skip platform tests when toolchain missing Saji 2024-09-27 01:04:17 -0500
• ef3df3ae92 format code Saji 2024-09-27 01:04:17 -0500
• bcac3d0dcd make basic config module Saji 2024-09-27 01:04:17 -0500
• 7e41e6e2f3 make flake use custom amaranth Saji 2024-09-26 10:33:41 -0500
• 3205c7104e update ci test flow Saji 2024-09-26 09:40:45 -0500
• ccdbc98cb0 add flake/nix formatter (nixfmt) Saji 2024-09-26 01:45:57 -0500
• 79927f0cbd flake now works with pyproject and flake-parts Saji 2024-09-25 10:13:34 -0500
• 20054ad034 add amaranth-boards, wip main package Saji 2024-09-24 20:52:44 -0500
• b25ab8bd52 start working on making flake work saji 2024-09-22 10:55:52 -0500
• 63811b929a add amaranth-boards to pdm, add platform pins saji 2024-09-22 10:55:52 -0500
• 3188fdefa5 wip: test works, bypass amaranth-boards not working saji 2024-09-21 22:33:47 -0500
• 20b16b6d40 add board,platform, wip cli saji 2024-09-21 22:33:47 -0500
• c601248cf2 move things into common Saji 2024-09-21 14:37:03 -0500
• 5820d80db2 add bbox construction tests, gamma docstring Saji 2024-09-21 10:04:54 -0500
• dd47014029 fix geom, add unittest saji 2024-09-19 14:32:02 -0500
• 477966b9c8 migrate tests saji 2024-09-19 14:32:02 -0500
• 75d6e15b42 add gamma module saji 2024-09-19 14:32:02 -0500
• 29464f91b4 add intersection saji 2024-09-19 14:32:02 -0500
• c6a81b5a76 initial coordinator saji 2024-09-19 14:32:02 -0500
• fbb39a85e5 added geometry module saji 2024-09-19 14:32:02 -0500
• 66b492e147 refactor around rgb666 remove 4xclocking for double-fetch architecture (still using 2xclock for better S/H) saji 2024-09-19 00:03:19 -0500
• fe4a902bd8 adjustment saji 2024-09-10 20:36:28 -0500
• ca472d7112 update tests saji 2024-09-10 15:19:13 -0500
• 386403bd12 add swapbank + test saji 2024-09-09 17:46:50 -0500
• 7a4de2e02d checkin saji 2024-09-03 11:15:59 -0500
• d42e227c4d add wip sdram controller, start multistring hub75 saji 2024-08-23 20:06:29 -0500
• bf35262640 add pytest saji 2024-08-23 18:02:26 -0500
• 1ccc0b3d39 remove old groovylight code saji 2024-08-21 16:22:16 -0500
• 83bb38ba6d initial effort saji 2024-08-21 16:20:40 -0500
• f3789b6432 sokol works, working on nix tooling master saji 2024-05-26 08:48:38 -0500
• 4b570ad5a5 Update sim/src/main.cpp saji 2024-05-25 17:33:36 +0000
• 8354677908 fix ci saji 2024-05-25 12:16:18 -0500
• 46a42180ed fix first pixel errors. saji 2024-05-25 12:04:12 -0500
• 905f61c814 fix cycle latency, broke first pixel saji 2024-05-24 01:23:49 -0500
• 70de66231b remove doc saji 2024-05-24 00:42:37 -0500
• 1628edad62 add basic mdbook doc saji 2024-05-23 12:07:53 -0500
• 37b813a015 cleanup, use checks instead of requires saji 2024-05-23 11:57:50 -0500
• c7fde88baf Update README.md saji 2024-05-23 06:21:48 +0000
• 7c7ccf81fc use ninja instead saji 2024-05-23 00:43:33 -0500
• fdca36f9ce add nix caching saji 2024-05-23 00:36:53 -0500
• 7cd0e1c53c fix bram behavior, adjust row offset saji 2024-05-23 00:34:26 -0500
• 32deb30c92 add gitea actions saji 2024-05-23 00:33:20 -0500
• d465fccaed wip: refactor and fix rightmost pixel bug saji 2024-05-22 22:26:33 -0500
• 2a7908eae9 wip: line scan test saji 2024-05-22 15:59:38 -0500
• da9c0c05a7 wip: text fixture refactor saji 2024-05-21 18:08:29 -0500
• 3a76a55e56 added more gitignore saji 2024-05-19 18:17:30 -0500
• d4df01f5c6 add basic verilator sim saji 2024-05-19 00:15:53 -0500
• b248c4d731 increase speed grade of chip to meet timing for bram saji 2024-05-10 11:31:51 -0500
• bcb463a8d0 wip: 4x clock double-read bram saji 2024-05-09 17:31:15 -0500
• 2a8c70bab2 fix bit-loading latency using comb logic saji 2024-05-02 20:30:51 -0500
• 37dabd603a coordinator works now saji 2024-05-01 16:14:32 -0500
• 9a4dfea4f0 wip: basic pixel generator + coordinator module saji 2024-04-30 23:48:10 -0500
• bd2fa51f2d wip: bitslicer saji 2024-04-30 01:41:31 -0500
• 31d612a2e8 wip: attempt at integrating, fail saji 2024-04-30 00:29:41 -0500
• 75ef4ad594 bram stuff saji 2024-04-29 01:16:36 -0500
• 00ebfa8009 initial verilog saji 2024-04-28 16:42:41 -0500
• a0e1dcbdb0 got it working, was a busted port saji 2024-04-27 01:49:10 -0500
• a7ba60b81f wip: wishbone tool and non-workign hub75 saji 2024-04-26 21:36:47 -0500
• 49e395653e add hub75 port mapping saji 2024-04-24 17:14:39 -0500
• ab8ef2c3d3 more things saji 2024-04-22 23:53:24 -0500
• 56aabf4fe9 added liteiclink for liteeth annoyingly saji 2024-04-19 15:39:59 -0500
• d798122a87 initial stuff saji 2024-04-19 15:16:22 -0500
• 44dd9f79c7 added litespi saji 2024-04-19 15:06:31 -0500
• 03370cff34 Initial commit saji 2024-04-19 15:13:39 +0000