6 commits

Author	SHA1	Message	Date
saji	d4df01f5c6	add basic verilator sim	2024-05-19 00:15:53 -05:00
saji	b248c4d731	increase speed grade of chip to meet timing for bram	2024-05-10 11:31:51 -05:00
saji	bcb463a8d0	wip: 4x clock double-read bram	2024-05-09 17:31:15 -05:00
saji	37dabd603a	coordinator works now ... fixed some off by one errors to make the screen work good	2024-05-01 16:14:32 -05:00
saji	31d612a2e8	wip: attempt at integrating, fail	2024-04-30 00:29:41 -05:00
saji	75ef4ad594	bram stuff	2024-04-29 01:16:36 -05:00