yosys4gal/extractions/olmc.v
2024-04-04 13:54:11 -05:00

16 lines
284 B
Verilog

module REG_OUT_P (C, A, Y);
input C, A;
output Y;
DFF_P dff_p_inst (.C(C), .D(A), .Q(Y));
GAL_OUTPUT gal_output_inst (.A(Y));
endmodule
module REG_OUT_N (C, A, Y);
input C, A;
output Y;
NDFF_P dff_p_inst (.C(C), .D(A), .Q(Y));
GAL_OUTPUT gal_output_inst (.A(X));
endmodule