saji/yosys4gal
1
0
Fork 0
mirror of https://github.com/annoyatron255/yosys4gal.git synced 2024-12-22 10:42:24 +00:00
Code Issues Packages Projects Releases Wiki Activity
Verilog Flow for the GAL16V8 and GAL22V10
6 commits 1 branch 0 tags 154 KiB
Rust 58.6%
Verilog 30.2%
Tcl 10.2%
Shell 1%
Find a file
annoyatron255 f565bf576d
Some edge cases cleaned up
2024-04-04 17:16:02 -05:00
extractions Add OLMC on internal combinational nodes 2024-04-04 13:54:11 -05:00
techmaps Some edge cases cleaned up 2024-04-04 17:16:02 -05:00
testcases Cleanup 2024-04-04 12:02:51 -05:00
abc.script Add OLMCs 2024-04-04 01:33:47 -05:00
cells_sim.v Cleanup 2024-04-04 12:02:51 -05:00
synth_gal.tcl Some edge cases cleaned up 2024-04-04 17:16:02 -05:00