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18 lines
231 B
Verilog
18 lines
231 B
Verilog
module GAL_INOUT_TRI(A, E, I, Y);
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input A, E;
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output I;
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inout Y;
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generate
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GAL_OLMC #(
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REGISTERED = 0,
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INVERTED = 0
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) _TECHMAP_REPLACE_ (
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.A(A),
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.C(1'bX),
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.E(E),
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.Y(E ? Y : I);
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);
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endgenerate
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endmodule
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