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Add extraction README/update techmap README

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annoyatron255 2024-05-06 01:42:29 -05:00
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extractions/README.md Normal file
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Extractions
===========
All the yosys extraction pass Verilog file used for mapping to the GAL
structure. See the `synth_gal.tcl` file for details on how they're used. A
summary is below (in the order they're used):
- `ndff.v` merges NOT gates and DFFs into a single cell. Used to set the active
high/low state of the GAL_OLMCs later
- `tristate.v` merges tristate cells and NOT gates or tristate cells and DFFs.
Used to combine tristate functionality into the GAL_OLMCs later

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techmaps/README.md
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@ -5,9 +5,13 @@ All the yosys techmapping libraries/Verilog files used for mapping to the GAL
structure. See the `synth_gal.tcl` file for details on how they're used.
A summary is below (in the order they're used):
- `gal_dff.lib` Liberty library for supported FFs (only positive edge-triggered
DFFs). Used to prevent yosys from using fancy flip-flops
- `pla.v` splits SOPs into a chain of SOPs with a specified size
- `trivial_sop.v` replaces SOPs which are just buffers/NOT gates with
buffer/NOT cells
- `olmc_seq.v` converts all existing sequential elements into GAL_OLMCs this
includes special merged types from other techmap passes/extractions
- `one_sop.v` converts GAL_SOPs with only one product into GAL_1SOPs. Used on
enabled (tristate) lines
- `pla_olmc_int.v` adds a combinational GAL_OLMC after a GAL_SOP. Used to