yosys4gal/testcases/olmc_test.v

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2024-04-04 17:02:51 +00:00
module olmc_test (clk, A, B, AND, NAND, REG_AND, REG_NAND);
input clk, A, B;
output AND, NAND;
output reg REG_AND, REG_NAND;
assign AND = A && B;
assign NAND = !(A && B);
always @ (posedge clk) begin
REG_AND <= A && B;
REG_NAND <= !(A && B);
end
endmodule