Asherah Connor
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a74227b405
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uv: have a go.
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2024-08-24 16:59:35 +03:00 |
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Asherah Connor
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cad501dda2
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template: move to docs/.
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2024-08-24 16:59:31 +03:00 |
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Asherah Connor
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fdc3e5ec56
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README: note.
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2024-08-18 11:39:43 +03:00 |
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Asherah Connor
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bf3738f777
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project: add NIAR_WORKING_DIRECTORY support.
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2024-08-18 11:27:27 +03:00 |
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Asherah Connor
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96df013632
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rejig for Nix/pure.
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2024-08-18 11:27:27 +03:00 |
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Asherah Connor
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bca15c1ba5
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CHANGELOG.md: prepare.
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2024-08-07 12:43:17 +03:00 |
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Asherah Connor
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b729590f81
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release v0.1.2.
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2024-08-07 12:43:00 +03:00 |
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Asherah Connor
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ca6847c21c
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CHANGELOG: 0.1 -> 0.1.0.
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2024-08-07 12:30:09 +03:00 |
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Asherah Connor
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15b4e93725
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TODO: elaborate.
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2024-08-07 11:52:11 +03:00 |
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Asherah Connor
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42b7bbede5
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TODO: add.
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2024-08-07 11:51:00 +03:00 |
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Asherah Connor
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11b388e18d
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README: add URL.
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2024-08-07 11:47:26 +03:00 |
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Asherah Connor
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5d8553a241
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build: fix path used with cached synthesis when programming.
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2024-07-04 20:18:34 +03:00 |
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Asherah Connor
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bb65ae312c
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pyproject.toml: use scm version.
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2024-07-04 18:25:41 +03:00 |
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Asherah Connor
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318af1aeb7
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style.
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2024-07-04 18:19:38 +03:00 |
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Asherah Connor
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98ac6138b1
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README: link CHANGELOG.
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2024-07-04 18:19:09 +03:00 |
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Asherah Connor
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3f85a404af
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CHANGELOG: update.
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2024-07-04 18:18:41 +03:00 |
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Asherah Connor
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e2ffef5cc2
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cxxrtl: always force for now.
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2024-07-04 18:14:07 +03:00 |
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Asherah Connor
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954de5e69d
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build: fix comments.
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2024-07-04 18:13:06 +03:00 |
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Asherah Connor
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445d0ed0c1
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build: include timing info in output info.
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2024-07-04 18:12:27 +03:00 |
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Asherah Connor
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ef5d43b417
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cxxrtl: note.
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2024-07-03 19:19:30 +03:00 |
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Asherah Connor
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a931d328be
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build: allow adding kwargs to prepare() call.
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2024-07-03 19:19:27 +03:00 |
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Asherah Connor
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3d32cf809e
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build: synth depends on .ys as well.
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2024-07-03 19:18:39 +03:00 |
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Asherah Connor
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289c0e96f9
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template: use latest amaranth-yosys, now we can opt!
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2024-07-03 16:34:17 +03:00 |
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Asherah Connor
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6ff5e58dbf
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CHANGELOG.md: update.
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2024-07-03 13:27:51 +03:00 |
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Asherah Connor
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8175fb5d0a
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build: use IL from plan, not on disk.
We haven't extracted it yet.
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2024-07-03 13:26:53 +03:00 |
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Asherah Connor
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12dc846334
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template: add .pdm-python to .gitignore.
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2024-07-02 14:10:29 +03:00 |
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Asherah Connor
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7572c3716a
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template: add lockfile.
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2024-07-02 13:09:02 +03:00 |
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Asherah Connor
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94bddbd996
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setup-action: rely on PDM, document.
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2024-07-02 13:08:45 +03:00 |
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Asherah Connor
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404601a50a
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pyproject.toml: depend on upstream amaranth-boards, update lock and amaranth accordingly.
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2024-07-02 13:00:10 +03:00 |
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Asherah Connor
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4db4fc2509
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template: clean up template project.
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2024-07-02 12:59:02 +03:00 |
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Asherah Connor
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db7ca3b5d2
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release v0.1.1.
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2024-07-02 12:53:53 +03:00 |
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Asherah Connor
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b57c9a5c25
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pyproject.toml: depend on amaranth >= 0.5.
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2024-07-02 12:48:02 +03:00 |
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Asherah Connor
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2381d6ef41
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Merge pull request #1 from kivikakk/pdm
use pdm fully.
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2024-07-02 12:42:59 +03:00 |
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Asherah Connor
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915b094cdb
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workflows: install OSS CAD Suite to test synth.
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2024-07-02 12:39:16 +03:00 |
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Asherah Connor
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1fc3c5697d
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workflows: .venv/bin/.
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2024-07-01 22:42:40 +03:00 |
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Asherah Connor
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222151cf55
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use pdm fully.
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2024-07-01 22:29:36 +03:00 |
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Asherah Connor
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596c60287d
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project: find root by looking for pyproject.toml.
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2024-06-29 19:20:54 +03:00 |
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Asherah Connor
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6f62b50278
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move to src layout.
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2024-06-29 19:11:16 +03:00 |
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Asherah Connor
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dc26ba8c44
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cxxrtl: only write "opt" out when actually opt; write "noopt" otherwise.
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2024-06-28 17:17:15 +03:00 |
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Asherah Connor
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359962b0fe
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cxxrtl: opt is between RTL and code.
RTL used to mean "-O3 on the CXXRTL-generated .cc". Now it means running
an opt pass in Yosys. Code covers all code: C++ (and Zig if used).
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2024-06-28 16:44:13 +03:00 |
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Asherah Connor
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34b8c3b3f2
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template: use "newproject" name in workflows, and -Onone with cxxrtl.
builtin-yosys doesn't support opt.
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2024-06-27 19:53:37 +03:00 |
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Asherah Connor
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10d7f867ff
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README: update.
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2024-06-27 19:53:11 +03:00 |
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Asherah Connor
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2eede7b1c4
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cxxrtl: log runtime.
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2024-06-27 19:45:59 +03:00 |
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Asherah Connor
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f6de8db366
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build: build subdir per platform.
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2024-06-27 19:45:54 +03:00 |
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Asherah Connor
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0ab73b31a6
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cxxrtl: put each CXXRTL platform in its own build directory.
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2024-06-27 19:37:29 +03:00 |
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Asherah Connor
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b4eef36627
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build: only resynthesise when input RTLIL changes.
Ouch.
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2024-06-27 19:26:33 +03:00 |
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Asherah Connor
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7aa12417e6
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cxxrtl: opt also optimises the design with Yosys.
This has a significant result on sim speed.
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2024-06-27 19:12:24 +03:00 |
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Asherah Connor
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02e500d295
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cxxrtl: fix zig build deps specification.
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2024-06-27 18:49:09 +03:00 |
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Asherah Connor
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12f3ecd3ce
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setup-action: install pytest-xdist, use in template.
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2024-06-27 18:47:21 +03:00 |
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Asherah Connor
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dc8c97b368
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setup-action: one day I will remember to include shell: bash.
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2024-06-27 18:45:32 +03:00 |
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