Commit graph

67 commits

Author SHA1 Message Date
saji b248c4d731 increase speed grade of chip to meet timing for bram 2024-05-10 11:31:51 -05:00
saji bcb463a8d0 wip: 4x clock double-read bram 2024-05-09 17:31:15 -05:00
saji 2a8c70bab2 fix bit-loading latency using comb logic
make frame counter for generating data
2024-05-02 20:30:51 -05:00
saji 37dabd603a coordinator works now
fixed some off by one errors to make the screen work good
2024-05-01 16:14:32 -05:00
saji 9a4dfea4f0 wip: basic pixel generator + coordinator module
coordinator is a high level hub75 controller.
It drives multiple panels by generating the x/y coordinates that would
be displayed on each, then converting those into the BRAM format to be
written quickly.
2024-04-30 23:48:10 -05:00
saji bd2fa51f2d wip: bitslicer 2024-04-30 01:41:31 -05:00
saji 31d612a2e8 wip: attempt at integrating, fail 2024-04-30 00:29:41 -05:00
saji 75ef4ad594 bram stuff 2024-04-29 01:16:36 -05:00
saji 00ebfa8009 initial verilog 2024-04-28 16:42:41 -05:00
saji a0e1dcbdb0 got it working, was a busted port 2024-04-27 01:49:10 -05:00
saji a7ba60b81f wip: wishbone tool and non-workign hub75 2024-04-26 21:36:47 -05:00
saji 49e395653e add hub75 port mapping 2024-04-24 17:14:39 -05:00
saji ab8ef2c3d3 more things 2024-04-22 23:53:24 -05:00
saji 56aabf4fe9 added liteiclink for liteeth annoyingly
Signed-off-by: saji <saji@saji.dev>
2024-04-19 15:41:43 -05:00
saji d798122a87 initial stuff 2024-04-19 15:16:22 -05:00
saji 44dd9f79c7 added litespi
Signed-off-by: saji <champ189@umn.edu>
2024-04-19 15:16:06 -05:00
saji 03370cff34 Initial commit 2024-04-19 15:13:39 +00:00