yosys4gal/models/prove_equiv.tcl
2024-05-03 21:44:22 -05:00

15 lines
213 B
Tcl
Executable file

#!/usr/bin/env -S yosys -c
yosys -import
read_verilog original.v
flatten
synth
read_verilog wrapper.v GAL16V8_reg.v
flatten
synth
equiv_make original wrapper equiv
equiv_induct equiv
equiv_status -assert equiv