2024-03-31 16:31:24 +00:00
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/dts-v1/;
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#include <st/l5/stm32l562Xe.dtsi>
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#include <st/l5/stm32l562zetx-pinctrl.dtsi>
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/ {
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model = "Telem3";
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compatible = "vendor,telem3";
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#address-cells = <1>;
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#size-cells = <1>;
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leds {
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compatible = "gpio-leds";
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fault_led: led_d12 {
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gpios = <&gpiod 12 GPIO_ACTIVE_HIGH>;
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label = "Fault Indicator";
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};
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status_led0: led_d10 {
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gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
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label = "Status 0 Indicator";
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};
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status_led1: led_d15 {
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gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
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label = "Status 1 Indicator";
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};
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status_led2: led_d13 {
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gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
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label = "Status 2 Indicator";
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};
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status_led3: led_d11 {
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gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
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label = "Status 3 Indicator";
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};
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good_led: led_d14 {
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gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
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label = "Good Indicator";
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};
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// TODO: should this really be here
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2024-04-02 05:06:19 +00:00
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gps_en: gps_en {
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gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
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label = "GPS power enable";
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};
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2024-03-31 16:31:24 +00:00
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};
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option_switches {
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compatible = "gpio-keys";
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option_0: opt_0 {
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gpios = <&gpioe 15 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Switch Option 0";
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};
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option_1: opt_1 {
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gpios = <&gpioe 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Switch Option 1";
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};
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option_2: opt_2 {
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gpios = <&gpioe 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Switch Option 2";
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};
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};
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chosen {
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2024-04-02 05:06:19 +00:00
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zephyr,console = &cdc_acm_uart;
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zephyr,shell-uart = &cdc_acm_uart;
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2024-03-31 16:31:24 +00:00
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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2024-03-31 18:44:33 +00:00
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zephyr,canbus = &fdcan1;
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2024-04-02 05:06:19 +00:00
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zephyr,sdmmc-disk = &sdmmc1;
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2024-03-31 16:31:24 +00:00
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};
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aliases {
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led0 = &good_led;
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sw0 = &option_0;
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die-temp0 = &die_temp;
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volt-sensor0 = &vref;
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volt-sensor1 = &vbat;
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2024-04-02 05:06:19 +00:00
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spi-flash0 = &spiflash0;
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2024-03-31 16:31:24 +00:00
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};
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2024-03-31 18:44:33 +00:00
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soc {
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fdcan1: can@4000a400 {
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compatible = "st,stm32-fdcan";
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reg = <0x4000a400 0x400>, <0x4000ac00 0x350>;
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reg-names = "m_can", "message_ram";
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interrupts = <39 0>, <40 0>;
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interrupt-names = "int0", "int1";
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>;
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bosch,mram-cfg = <0x0 28 8 3 3 0 3 3>;
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status = "disabled";
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};
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};
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2024-03-31 16:31:24 +00:00
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};
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// &clk_lse {
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// status = "okay";
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// };
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2024-04-02 05:06:19 +00:00
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&clk_hsi48 {
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status = "okay";
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};
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2024-03-31 16:31:24 +00:00
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&clk_hse {
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status = "okay";
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clock-frequency = <DT_FREQ_M(8)>;
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};
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&pll {
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// 96 MHz core, 48/24 elsewhere
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div-m = <1>;
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mul-n = <24>;
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div-p = <7>;
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div-q = <4>;
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div-r = <2>;
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status = "okay";
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clocks = <&clk_hse>;
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(96)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <4>;
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apb2-prescaler = <4>;
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};
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// stm32_lp_tick_source: &lptim1 {
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// clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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// <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
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// status = "okay";
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// };
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&usart1 {
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current-speed = <115200>;
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usart2 {
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current-speed = <9600>;
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pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
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pinctrl-names = "default";
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status = "okay";
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2024-04-02 05:06:19 +00:00
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gnss: l80_gps {
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2024-03-31 16:31:24 +00:00
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compatible = "gnss-nmea-generic";
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};
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};
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&rng {
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status = "okay";
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};
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&die_temp {
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status = "okay";
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};
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zephyr_udc0: &usb {
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pinctrl-0 = <&usb_dp_pa12 &usb_dm_pa11>;
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pinctrl-names = "default";
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status = "okay";
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2024-04-02 05:06:19 +00:00
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cdc_acm_uart: cdc_acm_uart {
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compatible = "zephyr,cdc-acm-uart";
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};
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2024-03-31 16:31:24 +00:00
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};
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&sdmmc1 {
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status = "okay";
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pinctrl-0 = <&sdmmc1_d0_pc8
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&sdmmc1_d1_pc9
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&sdmmc1_d2_pc10
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&sdmmc1_d3_pc11
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&sdmmc1_ck_pc12
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&sdmmc1_cmd_pd2>;
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2024-04-02 05:06:19 +00:00
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// bus-width = <4>;
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2024-03-31 16:31:24 +00:00
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pinctrl-names = "default";
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};
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&spi1 {
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pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
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pinctrl-names = "default";
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2024-03-31 18:44:33 +00:00
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cs-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>, <&gpioc 4 GPIO_ACTIVE_LOW>;
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2024-03-31 16:31:24 +00:00
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status = "okay";
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bme280@0 {
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compatible = "bosch,bme280";
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reg = <0>;
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spi-max-frequency = <DT_FREQ_M(1)>;
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};
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2024-03-31 18:44:33 +00:00
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/* TODO: add LSM6DS3 may need custom driver */
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2024-03-31 16:31:24 +00:00
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};
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&vref {
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status = "okay";
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};
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&vbat {
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status = "okay";
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};
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&iwdg {
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status = "okay";
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};
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&aes {
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status = "okay";
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};
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2024-03-31 18:44:33 +00:00
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&fdcan1 {
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status = "okay";
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>,
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<&rcc STM32_SRC_PLL_Q SAI2_SEL(0)>;
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bus-speed = <125000>;
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bus-speed-data = <125000>;
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pinctrl-0 = <&fdcan1_tx_pd1 &fdcan1_rx_pd0>;
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pinctrl-names = "default";
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};
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2024-04-02 05:06:19 +00:00
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&octospi1 {
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pinctrl-0 = <&octospi1_clk_pf10 &octospi1_ncs_pa2 \
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&octospi1_io0_pf8 &octospi1_io1_pf9 &octospi1_io2_pf7
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&octospi1_io3_pf6 &octospi1_io4_pc1 &octospi1_io5_pc2
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&octospi1_io6_pc3 &octospi1_io7_pc0>;
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pinctrl-names = "default";
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status = "okay";
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spiflash0: ospi-nor-flash@90000000 {
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compatible = "st,stm32-ospi-nor";
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reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
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ospi-max-frequency = <80000000>;
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spi-bus-width = <OSPI_QUAD_MODE>;
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data-rate = <OSPI_DTR_TRANSFER>;
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status = "okay";
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};
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};
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