mirror of
https://git.sr.ht/~kivikakk/niar
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66 lines
1.7 KiB
Python
66 lines
1.7 KiB
Python
from amaranth import Module, Signal
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from amaranth.lib import wiring
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from amaranth.lib.wiring import Out
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from ..targets import cxxrtl, icebreaker, ulx3s
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__all__ = ["Top"]
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class Top(wiring.Component):
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def __init__(self, platform):
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if isinstance(platform, cxxrtl):
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super().__init__(
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{
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"ledr": Out(1),
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"ledg": Out(1),
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}
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)
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else:
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super().__init__({})
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def elaborate(self, platform):
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m = Module()
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m.submodules.blinker = blinker = Blinker()
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match platform:
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case icebreaker():
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m.d.comb += platform.request("led_r").o.eq(blinker.ledr)
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m.d.comb += platform.request("led_g").o.eq(blinker.ledg)
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case ulx3s():
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m.d.comb += platform.request("led", 0).o.eq(blinker.ledr)
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m.d.comb += platform.request("led", 1).o.eq(blinker.ledg)
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case cxxrtl():
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m.d.comb += self.ledr.eq(blinker.ledr)
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m.d.comb += self.ledg.eq(blinker.ledg)
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return m
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class Blinker(wiring.Component):
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ledr: Out(1)
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ledg: Out(1)
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def elaborate(self, platform):
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m = Module()
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m.d.comb += self.ledg.eq(1)
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timer_top = (int(platform.default_clk_frequency) // 2) - 1
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timer_half = (int(platform.default_clk_frequency) // 4) - 1
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timer_reg = Signal(range(timer_top), init=timer_half)
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with m.If(timer_reg == 0):
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m.d.sync += [
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self.ledr.eq(~self.ledr),
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timer_reg.eq(timer_top),
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]
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with m.Else():
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m.d.sync += timer_reg.eq(timer_reg - 1)
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return m
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