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mirror of https://git.sr.ht/~kivikakk/niar synced 2024-12-22 22:22:24 +00:00
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cxxrtl: put externals separate to yosys script.

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Asherah Connor 2024-08-24 22:24:28 +03:00
parent fb7a8c2975
commit df82cbb17d
1 changed files with 14 additions and 11 deletions
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25
niar/cxxrtl.py
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@ -130,26 +130,29 @@ def main(np: Project, args):
f.write(rtlil_text) f.write(rtlil_text)
cxxrtl_cc_path = np.path.build(subdir, f"{np.name}.cc") cxxrtl_cc_path = np.path.build(subdir, f"{np.name}.cc")
yosys_script_path = _make_absolute(np.path.build(subdir, f"{np.name}.ys")) yosys_script_path = _make_yosys_relative(np.path.build(subdir, f"{np.name}.ys"))
black_boxes = {} black_boxes = {}
externals_paths = []
with open(yosys_script_path, "w") as f: with open(yosys_script_path, "w") as f:
for box_source in black_boxes.values(): for box_source in black_boxes.values():
f.write(f"read_rtlil <<rtlil\n{box_source}\nrtlil\n") f.write(f"read_rtlil <<rtlil\n{box_source}\nrtlil\n")
for p in np.externals: for p in np.externals:
f.write(f"read_verilog <<niar_read_verilog\n") target = np.path.build(subdir, "externals", p)
with open(np.path(p), 'r') as r: target.parent.mkdir(parents=True, exist_ok=True)
f.write(r.read()) with open(np.path(p), 'rb') as r:
f.write(f"\nniar_read_verilog\n") target.write_bytes(r.read())
f.write(f"read_rtlil {_make_absolute(il_path)}\n") externals_paths.append(target)
f.write(f"read_verilog {_make_yosys_relative(target)}\n")
f.write(f"read_rtlil {_make_yosys_relative(il_path)}\n")
if args.optimize.opt_rtl: if args.optimize.opt_rtl:
f.write("opt\n") f.write("opt\n")
f.write(f"write_rtlil {_make_absolute(il_path)}.opt\n") f.write(f"write_rtlil {_make_yosys_relative(il_path)}.opt\n")
else: else:
# Allow apples-to-apples comparison of generated RTLIL by # Allow apples-to-apples comparison of generated RTLIL by
# rewriting it with Yosys. # rewriting it with Yosys.
f.write(f"write_rtlil {_make_absolute(il_path)}.noopt\n") f.write(f"write_rtlil {_make_yosys_relative(il_path)}.noopt\n")
f.write(f"write_cxxrtl -header {_make_absolute(cxxrtl_cc_path)}\n") f.write(f"write_cxxrtl -header {_make_yosys_relative(cxxrtl_cc_path)}\n")
def rtlil_to_cc(): def rtlil_to_cc():
# "opt" without "proc" generates a bunch of warnings like: # "opt" without "proc" generates a bunch of warnings like:
@ -174,7 +177,7 @@ def main(np: Project, args):
yosys.run(["-q", yosys_script_path], ignore_warnings=True) yosys.run(["-q", yosys_script_path], ignore_warnings=True)
cr.add_process(rtlil_to_cc, cr.add_process(rtlil_to_cc,
infs=[il_path, yosys_script_path], infs=[il_path, yosys_script_path] + externals_paths,
outf=cxxrtl_cc_path) outf=cxxrtl_cc_path)
cr.run() cr.run()
@ -271,7 +274,7 @@ def main(np: Project, args):
cr.run_cmd(cmd, step="run") cr.run_cmd(cmd, step="run")
def _make_absolute(path): def _make_yosys_relative(path):
if path.is_absolute(): if path.is_absolute():
try: try:
path = path.relative_to(Path.cwd()) path = path.relative_to(Path.cwd())