generated from saji/ecp5-template
saji
9a4dfea4f0
coordinator is a high level hub75 controller. It drives multiple panels by generating the x/y coordinates that would be displayed on each, then converting those into the BRAM format to be written quickly.
44 lines
873 B
Systemverilog
44 lines
873 B
Systemverilog
`timescale 1ns / 100ps // 1 ns time unit, 100 ps resolution
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module bitslicer_tb;
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reg clk = 0;
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reg [23:0] rgb_in [2];
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reg start_write = 0;
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reg [7:0] pixnum = 0;
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wire [5:0] bitplane_data;
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wire [10:0] bitplane_addr;
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wire bitplane_wren;
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wire done;
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bitslicer dut(
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.clk(clk),
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.rgb(rgb_in),
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.pixnum(pixnum),
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.start_write(start_write),
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.bitplane_data(bitplane_data),
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.bitplane_addr(bitplane_addr),
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.done(done)
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);
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always #5 clk = !clk;
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initial begin
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$dumpfile("bitslicer_tb.vcd");
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$dumpvars(0, bitslicer_tb);
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rgb_in[0] <= 24'hEE8833;
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rgb_in[1] <= 24'hDD7722;
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pixnum <= 3;
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@(posedge clk);
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start_write <= 1;
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@(posedge clk);
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start_write <= 0;
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@(done);
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repeat (10) @(posedge clk);
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$finish();
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end
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initial begin
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repeat (100000) @(posedge clk);
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$finish();
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end
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endmodule
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