generated from saji/ecp5-template
fix bram behavior, adjust row offset
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Verilator Unit Tests / Test (push) Failing after 8m15s
Some checks failed
Verilator Unit Tests / Test (push) Failing after 8m15s
This commit is contained in:
parent
32deb30c92
commit
7cd0e1c53c
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@ -4,15 +4,14 @@
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#include "verilated.h"
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#include "verilated.h"
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#include "verilated_vcd_c.h"
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#include "verilated_vcd_c.h"
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#include <cstdint>
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#include <cstdint>
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#include <span>
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#include <memory>
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#include <memory>
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#include <queue>
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#include <queue>
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#include <span>
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#include <vector>
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#include <vector>
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// represents a generic co-simulated device.
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// represents a generic co-simulated device.
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// While this abstract class is very simple, it enables dynamic behavior to be added to the
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// While this abstract class is very simple, it enables dynamic behavior to be
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// simulation fixture.
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// added to the simulation fixture.
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class CosimulatedDevice {
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class CosimulatedDevice {
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public:
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public:
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virtual ~CosimulatedDevice(){};
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virtual ~CosimulatedDevice(){};
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@ -20,7 +19,6 @@ public:
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virtual void tick() = 0;
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virtual void tick() = 0;
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};
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};
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// Simple stimulus class used to trigger basic operations
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// Simple stimulus class used to trigger basic operations
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class PulseStimulus : public CosimulatedDevice {
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class PulseStimulus : public CosimulatedDevice {
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unsigned long width;
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unsigned long width;
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@ -51,6 +49,7 @@ class FakeBRAM : public CosimulatedDevice {
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unsigned long &data_out;
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unsigned long &data_out;
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unsigned char &clk;
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unsigned char &clk;
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unsigned char prev_clk;
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public:
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public:
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FakeBRAM(int latency, unsigned char &clk, unsigned short &addr_in,
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FakeBRAM(int latency, unsigned char &clk, unsigned short &addr_in,
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@ -68,17 +67,21 @@ public:
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for (int i = 0; i < latency; i++) {
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for (int i = 0; i < latency; i++) {
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addr_lookup_q.push(0);
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addr_lookup_q.push(0);
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}
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}
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prev_clk = clk;
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}
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}
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void tick() {
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void tick() {
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// we push and pop in the same tick: this way we keep the queue the same
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// we push and pop in the same tick: this way we keep the queue the same
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// size, acting as a pipeline delay.
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// size, acting as a pipeline delay.
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if (prev_clk == 0 && clk == 1) { // rising edge
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addr_lookup_q.push(addr_in);
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addr_lookup_q.push(addr_in);
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auto addr_to_load = addr_lookup_q.front();
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auto addr_to_load = addr_lookup_q.front();
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addr_lookup_q.pop();
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addr_lookup_q.pop();
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data_out = ram.at(addr_to_load);
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data_out = ram.at(addr_to_load);
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}
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}
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prev_clk = clk;
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}
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// TODO: allow accessing/setting the data
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// TODO: allow accessing/setting the data
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const std::span<uint64_t, 512> get() { return this->ram; }
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const std::span<uint64_t, 512> get() { return this->ram; }
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@ -86,14 +89,10 @@ public:
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void write(unsigned short addr, unsigned long data) { ram[addr] = data; }
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void write(unsigned short addr, unsigned long data) { ram[addr] = data; }
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};
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};
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// test fixture to reduce amount of runtime code.
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// test fixture to reduce amount of runtime code.
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// Supports:
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// Supports:
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// adding external modules
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// adding external modules
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// running the test
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// running the test
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// storing if the done flag was raised (or not)
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//
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// TODO: tracing.
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template <typename DUT> class VerilatorTestFixture {
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template <typename DUT> class VerilatorTestFixture {
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public:
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public:
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enum class FinishReason { Ok, Timeout };
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enum class FinishReason { Ok, Timeout };
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@ -58,7 +58,7 @@ TEST_CASE("HUB75E Driver Test") {
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// this is the part where we validate that the line in = line out.
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// this is the part where we validate that the line in = line out.
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// we have to generate different values since the
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// we have to generate different values since the
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fixture.enable_trace("testing.vcd");
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fixture.enable_trace("testing.vcd");
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auto line = GENERATE(take(10, chunk(256, random(0, 0xFFFFFF))));
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auto line = GENERATE(take(10, chunk(512, random(0, 0xFFFFFF))));
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auto bram = std::make_shared<FakeBRAM>(1, dut.clk, dut.pixbuf_addr,
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auto bram = std::make_shared<FakeBRAM>(1, dut.clk, dut.pixbuf_addr,
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dut.pixbuf_data);
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dut.pixbuf_data);
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@ -81,8 +81,8 @@ TEST_CASE("HUB75E Driver Test") {
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CAPTURE(i);
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CAPTURE(i);
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CAPTURE(ram_ref[i], row0[i]);
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CAPTURE(ram_ref[i], row0[i]);
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REQUIRE(ram_ref[i] == row0[i]);
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REQUIRE(ram_ref[i] == row0[i]);
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CAPTURE(ram_ref[i+128], row1[i]);
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CAPTURE(ram_ref[i+256], row1[i]);
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REQUIRE(ram_ref[i+128] == row1[i]);
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REQUIRE(ram_ref[i+256] == row1[i]);
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}
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}
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// CHECK(std::equal(ram_ref.begin(), ram_ref.begin() + 128, row0.begin(),
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// CHECK(std::equal(ram_ref.begin(), ram_ref.begin() + 128, row0.begin(),
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